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CVE-2024-45817
HIGH7.3
Description
In x86's APIC (Advanced Programmable Interrupt Controller) architecture, error conditions are reported in a status register. Furthermore, the OS can opt to receive an interrupt when a new error occurs. It is possible to configure the error interrupt with an illegal vector, which generates an error when an error interrupt is raised. This case causes Xen to recurse through vlapic_error(). The recursion itself is bounded; errors accumulate in the the status register and only generate an interrupt when a new status bit becomes set. However, the lock protecting this state in Xen will try to be taken recursively, and deadlock.
CVE Details
CVSS v3.1 Score7.3
SeverityHIGH
CVSS VectorCVSS:3.1/AV:N/AC:L/PR:N/UI:N/S:U/C:L/I:L/A:L
Attack VectorNETWORK
ComplexityLOW
Privileges RequiredNONE
User InteractionNONE
Published9/25/2024
Last Modified1/14/2026
Sourcenvd
Honeypot Sightings0
Affected Products
xen:xen
Weaknesses (CWE)
CWE-209
References
https://xenbits.xenproject.org/xsa/advisory-462.html(security@xen.org)
http://www.openwall.com/lists/oss-security/2024/09/24/1(af854a3a-2127-422b-91ae-364da2661108)
http://xenbits.xen.org/xsa/advisory-462.html(af854a3a-2127-422b-91ae-364da2661108)
IOC Correlations
No correlations recorded
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