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CVE-2025-54520
N/ADescription
Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.
Details CVE
Score CVSS v3.1N/A
Publie9/24/2025
Derniere modification9/26/2025
Sourcenvd
Observations honeypot0
Faiblesses (CWE)
CWE-1247
References
Correlations IOC
Aucune correlation enregistree
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