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CVE-2025-54520

N/A

Descripcion

Improper Protection Against Voltage and Clock Glitches in FPGA devices, could allow an attacker with physical access to undervolt the platform resulting in a loss of confidentiality.

Detalles CVE

Puntuacion CVSS v3.1N/A
Publicado9/24/2025
Ultima modificacion9/26/2025
Fuentenvd
Avistamientos honeypot0

Debilidades (CWE)

CWE-1247

Correlaciones IOC

Sin correlaciones registradas

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